Referring now to FIG. 1a, a magnetic tunneling junction (MTJ) or a giant magneto-resistance (GMR)/Spin Valve (SV) has two ferromagnetic layers, 11 and 12, separated by non-magnetic layer 13 which is a tunneling layer in a MTJ or a metal spacer layer in a GMR/SV. This basic structure has been widely studied for use as a storage element in a magnetic random access memory (MRAM). Usually, one of the ferromagnetic layers (11) has a fixed direction of magnetization (pinned reference layer), while the other layer (12) is free to switch its magnetization direction, and is called the free layer.
For MRAM applications, the MTJ or GMR stack is usually formed so as to provide shape anisotropy. This shape anisotropy comes about when the stack's shape ceases to be circular, typically being replaced by an ellipse. In its quiescent state, the free layer magnetization lies along the long axis of the cell (in FIG. 1b this is the X direction) and is either parallel or antiparallel to the direction of magnetization of the pinned layer. This long axis is referred to as the easy axis (x), and the direction perpendicular to it is the hard axis (y).
Digital information is thus encoded as the direction of magnetization in the free layer. FIG. 2 shows the resistance R of such a MTJ element as a function of external field Hs along the orientation of the pinned layer magnetization. When the field is off, the two states with minimum and maximum resistances correspond, respectively, to the free layer magnetization being substantially parallel or anti-parallel to the pinned layer magnetization. The field required to switch between the two states (Hs) is determined by the shape anisotropy energy of the element. When an additional external field is applied along the hard axis, at the same time, the value of Hs is reduced, reaching zero when the hard axis field reaches its saturation value (HYsat).
In MRAM applications, the two external fields used to program a given MRAM cell (designated 31 in FIG. 3) are generated by a pair of orthogonal current lines. Bit line 32 provides the easy axis field while word line 33 provides the hard axis field. To program a cell, both bit and word line currents are applied, the combination of these two fields overcoming the shape anisotropy and thereby setting the magnetization of the selected cell into a desired direction. However, although cell 31 is the selected cell, many other cells in the activated bit or word lines, though not intended to be programmed, are also exposed to fields from the bit or word line currents. Although these fields are smaller than the combined field at the selected cell, these cells can still be accidentally programmed, thereby causing an error. Cells of this type are referred to as half-select cells.
It follows from the above discussion that the values of both bit and word currents have to be carefully set—too low and the selected cell cannot be programmed reliably, too high and errors may occur in half-selected cells. The MRAM programming window is determined by 3 boundaries: the field line need to reliably write the selected cells, the distance between the bit line field to the smallest Hs at Iword=0, and the distance between the bit line field to the smallest Hs at Iword.
This window can be increased by increasing the shape anisotropy value. However such an approach demands higher bit and word currents which is undesirable in high density applications. An alternative approach (such as disclosed in U.S. Pat. No. 6,798,690 B1 and U.S. Pat. No. 6,798,691 B1) is to increase Hs at Iword=0 while maintaining Hs at Iword, by causing the free layer magnetization to be confined to a “C” shape (see FIG. 4a) so that, during switching, transient domain wall 41 (see FIG. 4c) is formed inside the cell. This can be achieved by patterning the MTJ cell into such “C” shapes. Free layers shaped this way will have higher Hs, as described by Ref.[1]. This C-state switching process is illustrated in finer detail by FIGS. 4a to 4e where the magnetizations in the two curved tip regions serve to guide the magnetization of the central region into the opposite direction. The creation of the transient domain configuration seen in FIG. 4c increases the energy barrier needed to switch the magnetization, i.e. it results in a higher value for Hs.
Once it enters the high hard axis field region, the switching behavior of the C-state returns to normal rotational mode. Thus for the C-state cells, the distance between the bit line field to the smallest Hs at Iword=0 is significantly increased. The conventional MRAM write operating point is set near the inflection point of the curves using combination fields generated by both word line and bit line, as indicated in the FIG. 6. Curve 63 is for the ellipse while curve 64 is for the C-shape.
Another approach to handling these two “half-select” issues has been to employ a segmented array architecture (U.S. Pat. No. 6,335,890 and U.S. Pat. No. 6,490,217). The segmented write field operating point 62 is also shown in FIG. 6 while a schematic layout for this architecture is depicted in FIG. 5. It also provides a technique for overcoming the limitations of conventional write selection schemes. By way of example only, a write operation directed to a specific segmented group, e.g., 334 in FIG. 5 will now be described. The illustrative select line memory array 300 directs the application of a destabilizing hard axis magnetic field to a subset of memory cells, namely, those memory cells associated with segmented group 334. All memory elements (i.e. 342 and 344) within the intended segmented group 334 are written simultaneously.
An unselected segmented group (e.g. 336) sharing a common write word line 386 with segmented group 334 does not receive a half-select field along its hard axis, even when the group select switch (e.g., 376) corresponding to the unselected segmented group 336 is enabled. This is primarily due to the fact that only one segmented bit slice among adjacent segmented bit slices, e.g., segmented bit slices N and N+1, can receive a destabilizing write current at any given time. Consequently, the magnitude of the hard axis field can be increased without disturbing the state of an unselected memory cell. Since all memory cells experiencing a hard axis field will, by definition, be written simultaneously, there are no half-selected memory cells along the word dimension using the segment write architecture.
With the segmented write architecture, the magnitude of the easy axis field (used to write the state of a memory cell) can be substantially decreased. The write margin between selected and half-selected cells is significantly increased. Moreover, because a large easy axis field is not required by the select line architecture of the invention, the bit line current required to write the memory cells can be significantly reduced, thus reducing the overall write current required by the memory array 300.    [1] “Switching field variation in patterned submicron magnetic film elements”, Youfeng Zheng, Jian-Gang Zhu, J. Appl. Phys. 81(8), 15, P5471, 1997
In addition to the reference cited above, a routine search of the prior art was performed with the following additional references of interest being found:
In U.S. Patent Application 2006/0013039, Braun et al. show a star-lobed structure for 2 bits storage. Their free layer magnetization has two easy axis directions 45 degree apart. U.S. Patent Application 2005/0242384 (Iwata et al) shows cruciform shapes, but this is along word/bit lines. U.S. Pat. No. 7,020,015 (Hong et al) shows a circle with a wedge removed and U-shaped structures both of which are variations of the basic “C” shape, while Hosotani, in U.S. Pat. No. 7,239,545, discloses first and second MTJ structures that together make an X-shape; i.e. two MTJs that store two bits and lie at an angle of 45 degrees to one another.